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MSC-PoL: Hybrid GaN-Si Multistacked Switched Capacitor 48V PwrSiP VRM for Chiplets

Author(s): Wang, Ping; Chen, Yenan; Szczeszynski, Gregory; Allen, Stephen; Giuliano, David; et al

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Abstract: This paper presents a multistack switched-capacitor point-of-load (MSC-PoL) voltage regulation module (VRM) with coupled magnetics for ultrahigh-current chiplet systems. In the MSC-PoL architecture, the stacked switched-capacitor cells split the high input voltage into several intermediate voltage rails, which are loaded with the switched-inductor cells to achieve soft charging and voltage regulation. Automatic capacitor voltage balancing and inductor current sharing are realized during the soft charging process. Many inductors of the switched-inductor cells are coupled into one and operated in interleaving to reduce the inductor current ripple and boost the transient speed. A 48-to-1-V/450-A VRM containing two MSC-PoL modules is built and tested, leveraging high voltage GaN devices for the frontend and high current Silicon devices for the back-end. Two ladder-structured coupled inductor designs are developed and compared, one of which installs a leakage magnetic plate to adjust the leakage inductance for lower current ripple. Featuring 3D stacked packaging, the entire power stage, gate drivers, and bootstrap circuits of one MSC-PoL module are enclosed into a 1/16-brick/0.31-in3/6-mm-thick package. The peak and the fullload efficiencies as well as the full-load power density (including both gate loss and size) of the MSC-PoL prototype with and without using the leakage plate are 91.7% and 89.5%, 85.8% and 85.6%, and 621 W/in3 and 724 W/in3, respectively. The 6-mm-thick MSC-PoL converter can be embedded into the chiplet or CPU socket, enabling power-supply-in-package (PwrSiP) for extreme efficiency, density, and control bandwidth.
Publication Date: 23-Feb-2023
Citation: Wang, Ping, Chen, Yenan, Szczeszynski, Gregory, Allen, Stephen, Giuliano, David, Chen, Minjie. (MSC-PoL: Hybrid GaN-Si Multistacked Switched Capacitor 48V PwrSiP VRM for Chiplets. 10.36227/techrxiv.22132694.v1
DOI: doi:10.36227/techrxiv.22132694.v1
Type of Material: Journal Article
Journal/Proceeding Title: IEEE Transactions on Power Electronics
Version: Author's manuscript

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