Verifying Correct Microarchitectural Enforcement of Memory Consistency Models
Author(s): Lustig, D; Pellauer, M; Martonosi, Margaret
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http://arks.princeton.edu/ark:/88435/pr13c2r| Abstract: | Memory consistency models define the rules and guarantees about the ordering and visibility of memory references on multithreaded CPUs and systems on chip. PipeCheck offers a methodology and automated tool for verifying that a particular microarchitecture correctly implements the consistency model required by its architectural specification. |
| Publication Date: | 2015 |
| Citation: | Lustig, D, Pellauer, M, Martonosi, M. (2015). Verifying Correct Microarchitectural Enforcement of Memory Consistency Models. IEEE Micro, 35 (72 - 82. doi:10.1109/MM.2015.47 |
| DOI: | doi:10.1109/MM.2015.47 |
| Pages: | 72 - 82 |
| Type of Material: | Journal Article |
| Journal/Proceeding Title: | IEEE Micro |
| Version: | Author's manuscript |
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