Verifying Correct Microarchitectural Enforcement of Memory Consistency Models
Author(s): Lustig, D; Pellauer, M; Martonosi, Margaret
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Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lustig, D | - |
dc.contributor.author | Pellauer, M | - |
dc.contributor.author | Martonosi, Margaret | - |
dc.date.accessioned | 2021-10-08T19:45:30Z | - |
dc.date.available | 2021-10-08T19:45:30Z | - |
dc.date.issued | 2015 | en_US |
dc.identifier.citation | Lustig, D, Pellauer, M, Martonosi, M. (2015). Verifying Correct Microarchitectural Enforcement of Memory Consistency Models. IEEE Micro, 35 (72 - 82. doi:10.1109/MM.2015.47 | en_US |
dc.identifier.uri | http://arks.princeton.edu/ark:/88435/pr13c2r | - |
dc.description.abstract | Memory consistency models define the rules and guarantees about the ordering and visibility of memory references on multithreaded CPUs and systems on chip. PipeCheck offers a methodology and automated tool for verifying that a particular microarchitecture correctly implements the consistency model required by its architectural specification. | en_US |
dc.format.extent | 72 - 82 | en_US |
dc.language.iso | en_US | en_US |
dc.relation.ispartof | IEEE Micro | en_US |
dc.rights | Author's manuscript | en_US |
dc.title | Verifying Correct Microarchitectural Enforcement of Memory Consistency Models | en_US |
dc.type | Journal Article | en_US |
dc.identifier.doi | doi:10.1109/MM.2015.47 | - |
pu.type.symplectic | http://www.symplectic.co.uk/publications/atom-terms/1.0/journal-article | en_US |
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VerifyCorrectMicroarchitecturalEnforcement.pdf | 268.54 kB | Adobe PDF | View/Download |
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