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|Abstract:||To meet an insatiable consumer demand for greater performance at less power, silicon technology has scaled to unprecedented dimensions. However, the pursuit of faster processors and longer battery life has come at the cost of reliability. Given the rise of processor reliability as a first-order design constraint, there has been a growing interest in low-cost, non-intrusive techniques for transient fault detection. Many of these recent proposals have counted on the availability of hardware recovery mechanisms. Although common in aggressive out-of-order cores, hardware support for speculative rollback and recovery is less common in lower-end commodity processors. This paper presents Encore, a software-based fault recovery mechanism tailored for these lower-cost systems that lack native hardware support for speculative rollback recovery. Encore combines program analysis, profile data, and simple code transformations to create statistically idempotent code regions that can recover from faults at very little cost. Using this software-only, compiler-based approach, Encore provides the ability to recover from transient faults without specialized hardware or the costs of traditional, full-system checkpointing solutions. Experimental results show that Encore, with just 14% of runtime overhead, can safely recover, on average from 97% of transient faults when coupled with existing detection schemes.|
|Citation:||Feng, Shuguang, Shantanu Gupta, Amin Ansari, Scott A. Mahlke, and David I. August. "Encore: low-cost, fine-grained transient fault recovery." Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture (2011): pp. 398-409. doi:10.1145/2155620.2155667|
|Pages:||398 - 409|
|Type of Material:||Conference Article|
|Journal/Proceeding Title:||Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture|
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