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ILAng: A Modeling and Verification Platform for SoCs Using Instruction-Level Abstractions

Author(s): Huang, Bo-Yuan; Zhang, Hongce; Gupta, Aarti; Malik, Sharad

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Abstract: We present ILAng, a platform for modeling and verification of systems-on-chip (SoCs) using Instruction-Level Abstractions (ILA). The ILA formal model targeting the hardware-software interface enables a clean separation of concerns between software and hardware through a unified model for heterogeneous processors and accelerators. Top-down it provides a specification for functional verification of hardware, and bottom-up it provides an abstraction for software/hardware co-verification. ILAng provides a programming interface for (i) constructing ILA models (ii) synthesizing ILA models from templates using program synthesis techniques (iii) verifying properties on ILA models (iv) behavioral equivalence checking between different ILA models, and between an ILA specification and an implementation. It also provides for translating models and properties into various languages (e.g., Verilog and SMT LIB2) for different verification settings and use of third-party verification tools. This paper demonstrates selected capabilities of the platform through case studies. Data or code related to this paper is available at: [9].
Publication Date: 2019
Citation: Huang, Bo-Yuan, Hongce Zhang, Aarti Gupta, and Sharad Malik. "ILAng: a modeling and verification platform for SoCs using instruction-level abstractions." In International Conference on Tools and Algorithms for the Construction and Analysis of Systems (2019): pp. 351-357. doi:10.1007/978-3-030-17462-0_21
DOI: 10.1007/978-3-030-17462-0_21
ISSN: 0302-9743
EISSN: 1611-3349
Pages: 351 - 357
Type of Material: Conference Article
Journal/Proceeding Title: International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Version: Final published version. This is an open access article.

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