Publication Date | Article Title | Author(s) |
2014 | An Adaptable Rule Placement for Software-Defined Networks | Zhang, Shuyuan; Ivancic, Franjo; Lumezanu, Cristian; Yuan, Yifei; Gupta, Aarti; et al |
26-Aug-2015 | Boolean Satisfiability Solvers and Their Applications in Model Checking | Vizel, Y; Weissenbacher, G; Malik, Sharad |
29-Mar-2016 | Constrained sampling and counting: Universal hashing meets SAT solving | Meel, KS; Vardi, MY; Chakraborty, S; Fremont, DJ; Seshia, SA; et al |
2012 | Efficient predictive analysis for detecting nondeterminism in multi-threaded programs | Sinha, Arnab; Malik, Sharad; Gupta, Aarti |
2012 | EPROF: An energy/performance/reliability optimization framework for streaming applications | Yetim, Yavuz; Malik, Sharad; Martonosi, Margaret |
Nov-2018 | A formal instruction-level GPU model for scalable verification | Xing, Yue; Huang, Bo-Yuan; Gupta, Aarti; Malik, Sharad |
2019 | ILAng: A Modeling and Verification Platform for SoCs Using Instruction-Level Abstractions | Huang, Bo-Yuan; Zhang, Hongce; Gupta, Aarti; Malik, Sharad |
Dec-2018 | Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification | Huang, Boyuan; Zhang, Hongce; Subramanyan, Pramod; Vizel, Yakir; Gupta, Aarti; et al |
18-Jul-2018 | Lazy self-composition for security verification | Yang, W; Vizel, Y; Subramanyan, P; Gupta, A; Malik, Sharad |
2012 | Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search | Sinha, Arnab; Malik, Sharad; Wang, Chao; Gupta, Aarti |
2021 | Syntax-Guided Synthesis for Lemma Generation in Hardware Model Checking | Zhang, Hongce; Gupta, Aarti; Malik, Sharad |
2020 | Synthesizing Environment Invariants for Modular Hardware Verification | Zhang, Hongce; Yang, Weikun; Fedyukovich, Grigory; Gupta, Aarti; Malik, Sharad |
Oct-2017 | Template-Based Parameterized Synthesis of Uniform Instruction-Level Abstractions for SoC Verification | Subramanyan, Pramod; Huang, Bo-Yuan; Vizel, Yakir; Gupta, Aarti; Malik, Sharad |
2014 | Using flow specifications of parameterized cache coherence protocols for verifying deadlock freedom | Sethi, D; Talupur, M; Malik, Sharad |